1. Field of the Invention
The present invention relates to semiconductor devices and methods of forming same and more particularly to a semiconductor device wafer base wherein a silicon carbide overlay is deposited on a suitable substrate.
2. Description of the Related Art
An extensive technology of semiconductor devices has been developed based upon the properties of single crystal silicon and other similar materials which may be doped, heat treated, and otherwise processed to produce adjacent layers and regions of varying electronic characteristics. The use of devices produced by silicon technology is generally limited to operation at ambient or, at most, moderately elevated temperatures and in non-corrosive, inert atmospheres. The temperature limitation is a consequence of the intrinsic behavior of silicon at high temperatures and of the rapid diffusion of dopants or impurity species, which in turn can substantially alter the character of the fabricated semiconductor device. The limitation to relatively inert environments results from the high chemical reactivity of silicon in many corrosive environments, which also can alter the character of the fabricated device. Silicon devices are also limited as to power level, frequency, and radiation tolerance by the materials used therein.
For some applications, the temperature, environmental, and other use limitations on silicon devices may be overcome by the use of proper cooling and packaging techniques. In other applications, these limitations have prevented the use of silicon for integrated circuit technology. For example, in many spacecraft and aircraft applications, elevated temperatures are encountered, and it is not always possible to insure that adequate cooling will be provided. In high power applications, internal thermal transients in devices otherwise operating at ambient temperature can rapidly destroy the operability of the device unless extensive cooling is provided. Such cooling requires that the device be larger in size that might otherwise be necessary, in part defeating the purpose of the integrated circuit technology.
There has therefore been an ongoing, but as yet not fully successful, search over a period of twenty years to identify and develop a semiconductor technology based in other materials. Such a technology would desirably allow the fabrication of devices for use at higher temperatures such as, for example, the range of at least about 400.degree. C. to 600.degree. C., and in applications not amenable to the use of silicon. Because corrosive effects can be greatly accelerated at elevated temperatures and pressures, any such materials and devices must also exhibit excellent corrosion resistance at the elevated use temperatures and over a range of pressures from vacuum to many atmospheres. Some generally desirable characteristics of such materials have been identified, including large band gap, good electrical conductivity, high breakdown electric field, low dielectric constant, ability to be doped to produce regions of varying electronic characteristics, a high melting temperature, good strength at operating temperatures, resistance to diffusion by undesired foreign atoms, good thermal conductivity, thermal stability, chemical inertness, and the ability to form ohmic external contacts.
Silicon carbide is a candidate material that can meet the requirements enumerated above. SiC is the only compound species that exists in the Si-C system, but it can occur in many crystalline polytypes. The lone cubic polytype is referred to as 3C-silicon carbide, or also as beta-SiC or .beta.-SiC. 3C-SiC crystallizes in the zinc-blende structure. About 170 hexagonal and rhombohedral polytypes are known, which are referred to collectively as "alpha-SiC." The most common is 6H, which has a hexagonal crystal structure.
3C-SiC has many properties superior to silicon and to gallium arsenide. Among the desirable properties of 3C-SiC are high breakdown voltage, a relatively large bandgap (2.3 eV at ambient temperature) and thermal conductivity over three times higher than that of silicon at ambient temperature. 3C-SiC is resistant to the diffusion of impurity species and may be processed by several techniques similar to those used in silicon device technology. The high thermal conductivity and high breakdown field obtainable for 3C-SiC predict that integration of high density devices can be achieved in this material.
Two figures of merit that are particularly relevant to the potential applications of 3C-SiC have been devised to compare semiconductor materials. Keyes Figure of Merit compares semiconductor materials on the basis of switching speeds that could in principle be obtained with transistors fabricated in the material. In this case a high limiting velocity allows high speed devices. Small, closely spaced devices have a high density of power dissipation (heat production). The heat flows from the device by conduction through the semiconductor material thereby encountering a thermal resistance that is inversely proportional to the size of the device. A lower limit is set on the device size by the maximum permissible thermal resistance and, thus, a high thermal conductivity .sigma..sub.T is greatly desirable in the device material. Keyes figure of merit is .sigma..sub.T (V.sub.sat /K).sup.1/2 where K is the dielectric constant of the material. Johnson's Figure of Merit compares semiconductor materials on basis of high frequency and high power capabilities for discrete devices. The basic limitation on various transistor characteristics is set by the product of the breakdown electric field E.sub.B and the saturated electron velocity V.sub.sat, i.e. the velocity at which an electron has sufficient energy to emit an optical photon. Johnson's figure of merit is (E.sub.B V.sub.sat /.pi.).sup.2. A comparison of Johnson's and Key's figures of merit for various semiconductor materials vs. silicon (from "Critical Evaluation of the Status of the Areas for Future Research Regarding the Wide Band Gap Semiconductors Diamond, Gallium Nitride and Silicon Carbide," Davis et al., Materials Science and Engineering, B1 (1988), pp. 77-104) shows the potential usefulness of 3C-SiC for high temperature, high power semiconductor devices:
______________________________________ Johnson's Figure of Merit Keyes' Figure of Merit Material (ratio to Si) (ratio to Si) ______________________________________ Silicon 1.0 1.0 GaAs 6.9 0.456 InP 16.0 0.608 GaN 281.6 1.76 6H-SiC 695.4 5.12 3C-SiC 1137.8 5.8 ______________________________________
Mehdi, Haddad and Mains have performed an numerical simulation analysis that shows that 3C-SiC may be especially useful for high frequency, high power devices such as impact avalanche transit-time (IMPATT) diodes (J. Appl. Phys. 64, 1533(1988)). 3C-SiC devices theoretically can produce significantly higher powers than Si and GaAs devices at comparable frequencies.
An additional advantage of 3C-SiC is that many device processing steps that have been developed for Si may be used with very little modification. Among the 3C-SiC similarities to Si that are relevant to device processing are: 3C-SiC has a shallow donor dopant (N) which can be incorporated controllably during epitaxial growth or by ion implantation; 3C-SiC has a shallow acceptor dopant (Al) which can be incorporated controllably during epitaxial growth or by ion implantation; it is possible to grow thermal SiO.sub.2 with good electrical properties (prototype 3C-SiC MOSFETs operating at 650.degree. C. have been fabricated; see Davis et al. referenced above); 3C-SiC is not etched by HF; 3C-SiC can withstand temperatures up to 1550.degree. C. during homo- or heteroepitaxial growth. Silicon carbide may thus be processed by several techniques similar to those used in silicon device technology, and in many instances silicon carbide devices may be substituted at moderate and low temperatures for silicon devices. Silicon carbide semiconductor device technology therefore offers the opportunity for supplementing, and in some instances replacing, conventional silicon device technology.
The chief obstacle to the production of 3C-SiC devices has been the difficulty of producing unpolytyped SiC single crystals of sufficient size to allow fabrication of devices. SiC does not melt congruently; 3C-SiC converts to an alpha polytype above 1600.degree. C. and dissociates at 2830.degree. C. under 35 atmospheres of argon.
Small bulk crystals of 3C-SiC have been made, .about.2 mm.times.2 mm. These small crystals showed that devices would indeed be extremely useful but not big enough realistically to fabricate device arrays as is done with silicon. Therefore although device potential has been demonstrated on a very small scale, there have been no demonstrations of devices on a large enough scale to be useful. Small scale devices fabricated from vapor-grown SiC crystals included uv flame detectors, grown junction diode rectifiers, and thermistors.
An alternative to growing bulk crystals and fabricating devices by homoepitaxy is preparation of wafer bases by heteroepitaxially depositing an overlay onto a foreign substrate. A high quality, single crystal substrate with a good lattice match is required for the success of this approach. Previous efforts tried this approach using 3C-SiC single crystal substrates, but large 3C-SiC single crystals have not been prepared without included alpha polytypes. The 3C-SiC overlay carried the defects forward. Silicon substrates have been tried, but the coefficient of thermal expansion of silicon is about 8% different and lattice parameters differ by 20%. Lattice mismatch results in formation of numerous microtwins, intrinsic stacking faults and antiphase boundaries (APBs). Use of the &lt;100&gt; silicon surface, slightly off-axis, reduces the number of APBs but does not completely eliminate them. Unfortunately other types of defects are not eliminated by this procedure. Carburization of the silicon surface has been tried in an only partially successful attempt to ameliorate these problems. 6H-SiC, with its hexagonal crystal structure, also has proven unsuitable as a substrate, because APBs are formed when it is attempted to form epitaxial overlays of 3C-SiC (for example, see H. S. Kong, J. W. Palmour, J. T. Glass and R. F. Davis, Appl. Phys. Lett., 51,442 (1987)). Stacking faults typically emanate from these APBs. APBs and the resulting stacking faults degrade semiconductor performance, causing high parasitic resistances that would prevent high frequency operation of semiconductor devices. Alpha SiC has many polytypes, and inhomogeneous polytypes will lead to inhomogeneous heteroepitaxial 3 C-SiC films. Various metals that have cubic crystal structures have been tried, such as molybdenum with and without a liquid metal intermediate layer. However, pure metals have problems with diffusion of the Si and C into the metal. The cubic metals that are potentially useful on the basis of their lattice dimensions are carbide-formers. Carbon diffuses into the metal surface and forms metal carbides; it is difficult to control Si:C stoichiometry during growth. Most high-melting metals have the body-centered cubic (bcc) structure; bcc metal substrates would lead to many APBs in the 3C-SiC overlay. Also, metal silicide formation can occur at the interface, preventing true epitaxy.
Therefore, to summarize the many problems with substrates:
no large single crystals PA0 large lattice parameter mismatch PA0 thermal expansion mismatch PA0 defects in the substrate cause unsatisfactory surface morphology and crystal quality of resulting 3C-SiC overlay
Larger scale devices require large area 3C-SiC epitaxial layers suitable for device or IC processing. These epitaxial layers must be able to be formed reproducibly, in single crystals having lateral dimensions greater than several square millimeters by a fabrication technique that does not adversely influence the key properties of the 3C-SiC overlayer, that is, its thermal stability, corrosion resistance, and desirable electrical properties.
Bunshah, Parsons and Stafsudd attempted to solve the substrate problem by using cubic TiC (or, alternatively, ZrC, WC, TaC or ScN) single crystals as substrates, most especially favoring TiC because: (1) TiC has a good lattice match to 3C-SiC (TiC has a lattice parameter of 4.33 .ANG. compared to 4.36 .ANG. for 3C-SiC, the lattice parameters thus differing by only 0.7% at ambient temperatures; (2) TiC has only one polymorph and no polytypes; (3) TiC and 3C-SiC have an acceptable coefficient of thermal expansion match, with TiC having a slightly larger thermal expansion. This larger thermal expansion is helpful, since it places the 3C-SiC film into slight compression upon cooldown after film growth, rendering formation of microcracks and pinholes less likely. In general, the surface morphology of thick (&gt;1 .mu.m) epilayers tends to be rough when the epilayers are tensionally loaded. If the TiC is of good quality, the resulting 3C-SiC crystals have a very low density of stacking faults and other crystalline defects.
Additionally, Ti is electrically inert in SiC. At the high temperatures of 3C-SiC growth (1200.degree.-1600.degree. C.), some interdiffusion can be expected to occur, but without deleterious electrical effects. If desired, interdiffusion of Ti into the SiC can be prevented by saturating the surface of the TiC with carbon immediately before SiC growth.
Any TiC crystallographic orientation will support heteroepitaxy of 3C-SiC. Growth on the &lt;111&gt; surface is preferred and off-axis slicing can improve lattice matching. TiC is a good electrical conductor with a work function of .about.3eV, allowing for the possibility of fabricating novel devices such as permeable base transistors. TiC has higher thermal conductivity than SiC or Si, and thus thermal gradients are minimized and thermal energy dissipation is enhanced.
Despite these potentially significant advantages, serious problems are encountered in preparing single crystal TiC of adequate size and quality. Large area single crystals of TiC are unavailable, and this lack is hindering 3C-SiC device development.
Carbide single crystals are grown by float zone techniques because the materials melt at such high temperatures that it has not been possible to realize uncontaminated crystal growth by methods that require a container. Alternative methods that could potentially be used for TiC single crystal growth include other "crucible-less" techniques such as skull melting. The same problems and advantages as are confronted in float-zoning would apply to these methods.
The float zone process involves formation of a molten zone and subsequent movement of the zone along a feed rod which is made from pressed and sintered powders of the substance that one is trying to recrystallize. Float zoning has the advantage that no contamination from a crucible occurs. Large crystals may usually be prepared by this technique.
TiC single crystals are grown by float zone techniques because of the high melting point of TiC. Problems that hinder TiC crystal growth include the following:
(1) cracks are prone to form,
(2) subgrain boundaries are usually observed and these generate grain boundaries in the epitaxial 3C-SiC overlayer,
(3) pinholes form, creating pinholes in the SiC overlayer, and
(4) stacking faults and other dislocations are difficult to avoid in float zoned TiC. These defects create poor morphology and crystal imperfections in the epitaxial overlayer of 3C-SiC.
Several possible explanations for the problems encountered in growing TiC single crystals have been advanced. The molten zone is at a very high temperature because of the high melting point (3160.degree. C.) of TiC; therefore enormous thermal stresses are present during growth. The stresses in the "cooldown" region near the molten zone are severe, from the molten temperature of &gt;3000.degree. C. down to about 1500.degree. C. Below 1500.degree.-800.degree. C., cracking occurs. It is generally believed that below 800.degree. C., dislocations do not move through the crystal. These thermal stresses cause dislocations and defects. It is difficult to heat a large feed rod uniformly, exacerbating the thermal stress problem that already exists with cooldown. It will be very hard indeed to heat a 2 inch diameter rod uniformly, and this is the size that must be targeted for economical device fabrication processes. Arcing is a problem in float zoning at high powers. In TiC float zone recrystallization, a very large amount of rf power is required; the growing crystal is blanketed with helium to prevent arcing, but the helium has a high thermal conductivity and carries enough heat away from the rod to significantly contribute to the thermal stress problem. TiC has a high vapor pressure at its melting point and can vaporize and coat the induction coils, increasing the likelihood of arcing.
Solid solutions of cubic carbides are known. A prominent characteristic of the cubic monocarbides is their extensive mutual solubility. In general, the cubic carbides are mutually soluble in all concentration ranges when the covalent radii of the metal atoms differ by less than 10%.
Hollox et al. (U.S. Pat. No. 3,661,599), in efforts to make high temperature structural materials, alloyed vanadium carbide into TiC. Feed rods were prepared by mixing TiC and VC powders in specified ratios and pressing and sintering the rods. A molten zone was passed through these prepared feed rods (a process referred to as "zone refining"). Previously, cubic carbide structural materials in powder mixtures had been sintered and did not form fully dense solids. These less than fully dense carbide solids thus were not optimally strong for the structural applications that Hollox et al. were targeting. U.S. Pat. No. 3,661,599 teaches alloying powders followed by zone refining to lead to fully dense, single phase materials, which had several advantages. The zone refined alloys were extremely strong, judged by compressive yield strength (CYS). Most significantly, the alloys were stronger than the pure materials. The alloy containing 25% TiC: 75% VC by weight was the strongest at high temperatures (&gt;1200.degree. C.), with the 50:50 alloy close behind. Above 1400.degree. C., 75% TiC: 25% VC has CYS 1/3 of 25% TiC: 75% VC. The TiC and VC pure carbides have much lower CYS, which fell off markedly at temperatures above about 1200.degree.-1400.degree. C.
There are several possible rationalizations for the observation that the mixture may be much stronger than the single pure component. Dislocations travel through a mixed lattice less easily. Higher yield strength may imply less defect formation under the highest thermal stresses. It is worth noting that the CYS improvement was observed in the temperature regime where the thermal stresses are the greatest during float zone cool-down. The allows were easier to float zone than the pure carbides. Alloying decreased the number and size of cracks in the resulting crystalline boule. The carbide alloys formed by the process of U.S. Pat. No. 3,661,599 could be polycrystalline or single crystal, depending on the rate the molten zone was passed along the rod.
It is known that the dislocation density of semiconductor compounds of columns III-V and II-VI of the periodic chart can be reduced by proper introduction of alloying atoms into the compounds. In Sher U.S. Pat. No. 4,607,202 and Mooney et al. U.S. Pat. No. 4,568,795, it is taught that the dislocation density of III-V and II-VI semiconductor compounds can be reduced by alloying such semiconductors with isoelectronic impurity atoms forming bond lengths with the semiconductor atoms that are less than the bond lengths between atoms of the semiconductor. The alloying atoms can be added in relatively low amounts only, so that the solubility limit of the host semiconductor compound cannot be exceeded. This value is insufficient to eliminate dislocations totally.
Parsons and Stafsudd (International Patent Publication WO 89/06438) have described alloying of silicon carbide with one or more of the carbides of Ti, Hf, Zr, V, Ta, Mo, W, and Nb, with Ti, Hf, and Zr preferred. By selecting appropriate proportions of metal carbide and SiC, the alloy's bandgap may be tailored to any desired level between the bandgaps of the metal carbide and SiC. Semiconductor devices are formed by epitaxially growing a layer of the new alloy upon a latticematching substrate, preferably TiC. While retaining the benefits of single-bandgap 3C-SiC, the new alloys may enable various electrical devices that cannot be achieved with 3C-SiC, and also have a potential for bandfolded superlattices for infrared detectors and lasers. Solid solutions of 3C-SiC with aluminum nitride to modify the bandgap have been reported ("Synthesis and study of epitaxial layers of (SiC).sub.1-x (AIN).sub.x wide-gap solid solutions, "Nurmagomedov, et al., Sov. Tech. Phys. Lett. 12(9), p. 431 (1987)) and show promise as materials for optoelectronics and acoustoelectronics. These solid solutions are thought to retain cubic crystal structure at very low AIN concentrations. The problems of substrate suitability and producibility that plague 3C-SiC device development will also hinder the development of devices based on the silicon carbide alloys and solid solutions. Hence, while the discussion herein refers to 3C-SiC, it will be appreciated that the same considerations and advantages of the present invention will apply to the SiC alloys and solid solutions as well.
It is an object of the present invention to provide a device wafer base of 3C-SiC overlaid upon a substrate which is a single crystal having dimensions greater than several mm so that arrays of devices can be processed and prepared thereon. Another object of the invention is to provide a method for fabricating the wafer base using alloys suitable to form the single crystal substrate. Another object of the invention is to provide a method for making single crystals suitable for serving as the substrates for 3C-SiC overlay to form a device wafer base. Other objects and advantages of the present invention will be more apparent from the ensuing disclosure and the appended claims.